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EL1509
Data Sheet March 26, 2007 FN7015.2
Medium Power Differential Line Driver
The EL1509 is a dual operational amplifier designed for customer premise line driving in DMT ADSL solutions. This device features a high drive capability of 250mA while consuming only 7.1mA of supply current per amplifier and operating from a single 5V to 12V supply. This driver achieves a typical distortion of less than -85dBc, at 150kHz into a 25 load. The EL1509 is available in the industry standard 8 Ld SOIC as well as the thermally-enhanced 8 Ld DFN package. Both are specified for operation over the full -40C to +85C temperature range. The EL1509 is ideal for ADSL, SDSL, HDSL2 and VDSL line driving applications.
Features
* Drives up to 250mA from a +12V supply * 20VP-P differential output drive into 100 * -85dBc typical driver output distortion at full output at 150kHz * Low quiescent current of 7.5mA per amplifier * Pb-free plus anneal available (RoHS compliant)
Applications
* ADSL G.lite CO line driving * ADSL full rate CPE line driving * G.SHDSL, HDSL2 line driver
Ordering Information
PART NUMBER EL1509CS EL1509CS-T7 EL1509CS-T13 EL1509CSZ (See Note) EL1509CSZ-T7 (See Note) PART MARKING 1509CS 1509CS 1509CS 1509CSZ 1509CSZ TAPE & REEL PACKAGE 7" 13" 7" 13" 7" 13" 8 Ld SOIC 8 Ld SOIC 8 Ld SOIC 8 Ld SOIC (Pb-Free) 8 Ld SOIC (Pb-Free) 8 Ld SOIC (Pb-Free) 8 Ld DFN 8 Ld DFN 8 Ld DFN PKG. DWG. # MDP0027 MDP0027 MDP0027 MDP0027
* Video distribution amplifier * Video twisted-pair line driver
Pinouts
EL1509 (8 LD SOIC) TOP VIEW
OUTA 1 8 VS
+
MDP0027
INA- 2 7 OUTB 6 INB+
EL1509CSZ-T13 1509CSZ (See Note) EL1509CL EL1509CL-T7 EL1509CL-T13 1509CL 1509CL 1509CL
MDP0027 MDP0047 MDP0047 MDP0047
INA+ 3 GND 4
5 INB+
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
EL1509 (8 LD DFN) TOP VIEW
OUTA INAINA+ GND
1 2 3 4
8 VS 7 OUTB 6 INB5 INB+
+
AMP A
+
AMP B
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002-2004, 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL1509
Absolute Maximum Ratings (TA = +25C)
VS+ Voltage to Ground . . . . . . . . . . . . . . . . . . . . . . -0.3V to +14.6V VIN+ Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to VS+ Current into any Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 75mA Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40C to +85C Storage Temperature Range . . . . . . . . . . . . . . . . . .-60C to +150C Operating Junction Temperature . . . . . . . . . . . . . . .-40C to +150C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER AC PERFORMANCE BW HD dG d SR -3dB Bandwidth
VS = +12V, RF = 1.5k, RL = 100 connected to mid supply, TA = 25C, unless otherwise specified. CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
AV = +4 f = 150kHz, VO = 16VP-P, RL = 25 AV = +2, RL = 37.5 AV = +2, RL = 37.5 VOUT from -3V to +3V 350
70 -85 0.15 0.1 500
MHz dBc % V/s
Total Harmonic Distortion Differential Gain Differential Phase Slewrate
DC PERFORMANCE VOS VOS ROL Offset Voltage VOS Mismatch Transimpedance VOUT from -4.5V to +4.5V -20 -10 0.7 1.4 20 10 2.5 mV mV M
INPUT CHARACTERISTICS IB+ IBIBeN iN Non-Inverting Input Bias Current Inverting Input Bias Current IB- Mismatch Input Noise Voltage -Input Noise Current -5 -30 -30 2.8 19 5 30 30 A A A nV/ Hz pA/ Hz
OUTPUT CHARACTERISTICS VOUT Loaded Output Swing (single ended) VS = 6V, RL = 100 to GND VS = 6V, RL = 25 to GND IOUT SUPPLY VS IS Supply Voltage Supply Current Single Supply All Outputs at Mid Supply 5 14.2 12 18 V mA Output Current RL = 0 4.8 4.4 5 4.7 450 V V mA
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FN7015.2 March 26, 2007
EL1509 Typical Performance Curves
28 24 GAIN (dB) 20 16 12 8 100K AV=10 VS=6V RL=100 28 24 GAIN (dB) 20 16 12 8 100K AV=10 VS=6V RL=100 RF=1.5k RF=1k
RF=1.5k
RF=1k
RF=2k
RF=2k
1M
10M
100M
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 1. DIFFERENTIAL FREQUENCY RESPONSE vs RF (EL1509CS)
FIGURE 2. DIFFERENTIAL FREQUENCY RESPONSE vs RF (EL1509CL)
22 18 GAIN (dB) 14 10 6 2 100K RF=2k AV=5 VS=6V RL=100 RF=1.5k RF=1k GAIN (dB)
22 18 14 10 6 2 100K AV=5 VS=6V RL=100 RF=1.5k
RF=1k
RF=2k
1M
10M
100M
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 3. DIFFERENTIAL FREQUENCY RESPONSE vs RF (EL1509CS)
FIGURE 4. DIFFERENTIAL FREQUENCY RESPONSE vs RF (EL1509CL)
22 18 GAIN (dB) 14 CL=0pF 10 6 2 100K AV=5 VS=6V RL=100 RF=1.5k CL=22pF CL=10pF GAIN (dB)
22 18 14 10 6 2 100K CL=0pF AV=5 VS=6V RL=100 RF=1.5k CL=22pF CL=10pF
1M
10M
100M
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. DIFFERENTIAL FREQUENCY RESPONSE vs CL (EL1509CS)
FIGURE 6. DIFFERENTIAL FREQUENCY RESPONSE vs CL (EL1509CL)
3
FN7015.2 March 26, 2007
EL1509 Typical Performance Curves
55 53 51 49 BW (MHz) 47 45 43 41 39 37 35 2.5 3 3.5 4 4.5 5 5.5 6 EL1509CS AV=5 RF=1.5k RL=100 EL1509CL HD (dB) -45 -50 -55 -60 -65 -70 -75 -80 -85 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VS (V) VOP-P (V) HD3 HD2 VS=2.5V AV=5 RF=1.5k RL=100 f=1MHz
FIGURE 7. DIFFERENTIAL BANDWIDTH vs SUPPLY VOLTAGE
FIGURE 8. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (ALL PACKAGES)
4 3 PEAKING (dB) 2 1 0 -1 -2 2.5 EL1509CS HD (dB) AV=5 RF=1.5k RL=100
-45 -50 -55 -60 -65 -70 -75 -80 -85 -90 3 3.5 4 4.5 5 5.5 6 1 3 5 7 9 11 13 15 17 19 VS (V) VOP-P (V) HD2 HD3 VS=6V AV=5 RF=1.5k RL=100 f=1MHz
EL1509CL
FIGURE 9. DIFFERENTIAL PEAKING vs SUPPLY VOLTAGE
FIGURE 10. DIFFERENTIAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (ALL PACKAGES)
-45 -50 -55 THD (dB) -60 -65 -70 -75 -80 -85 -90 1 3 5 7 9 11 VS=2.5V
AV=5 RF=1.5k RL=100 f=150kHz THD (dB)
-45 -50 -55 -60 -65 -70 -75 -80 VS=2.5V
AV=5V RF=1.5k RL=100 f=1MHz
VS=6V
VS=6V
13
15
17
19
21
1
3
5
7
9
11
13
15
17
19
VOP-P (V)
VOP-P (V)
FIGURE 11. DIFFERENTIAL TOTAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (ALL PACKAGES)
FIGURE 12. DIFFERENTIAL TOTAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT (ALL PACKAGES)
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FN7015.2 March 26, 2007
EL1509 Typical Performance Curves
-10 -30 ISOLATION (dB) -40 -50 -60 -70 -80 -90 -100 -110 10K 100K 1M FREQUENCY (Hz) 10M 100M 1 10 100 1K 10K 100K 1M 10M 100M AB BA VOLTAGE NOISE (nV/Hz), CURRENT NOISE (pA/Hz) -20 100
IB10
EN IB+
FREQUENCY (Hz)
FIGURE 13. CHANNEL ISOLATION vs FREQUENCY
FIGURE 14. VOLTAGE AND CURRENT NOISE vs FREQUENCY
30 10 0 PSRR (dB) -10 -20 -30 -40 -50 -60 -70 10K 100K 1M FREQUENCY (Hz) 10M 100M PSRRPSRR+ OUTPUT IMPEDANCE () 20
100 10 1 0.1 0.01 0.001 10K VS=12V AV=1 RF=1.5k
100K
1M FREQUENCY (Hz)
10M
100M
FIGURE 15. POWER SUPPLY REJECTION vs FREQUENCY
FIGURE 16. OUTPUT IMPEDANCE vs FREQUENCY
10M 1M MAGNITUDE () 100K 10K 1K GAIN PHASE
50 DIFFERENTIAL GAIN (%), DIFFERENTIAL PHASE () 0 -50 PHASE () -100 -150 -200 -250
0.06 0.05 0.04 GAIN 0.03 0.02 0.01 0 0 1 2 3 4 5 NUMBER OF 150 LOADS PHASE
100 100
1K
10K
100K
1M
10M
-300 100M
FREQUENCY (Hz)
FIGURE 17. TRANSIMEDANCE (ROL) vs FREQUENCY
FIGURE 18. DIFFERENTIAL GAIN & PHASE
5
FN7015.2 March 26, 2007
EL1509 Typical Performance Curves
14.5 INPUT BIAS CURRENT (A) SUPPLY CURRENT (mA) 10 8 6 4 2 0 -2 -4 -6 -8 12.5 -50 -25 0 25 50 75 100 125 150 -10 -50 -25 0 25 50 75 100 125 150 IB+ IB-
14
13.5
13
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 19. SUPPLY CURRENT vs TEMPERATURE
FIGURE 20. INPUT BIAS CURRENT vs TEMPERATURE
5.2 RL=100 OUTPUT VOLTAGE (V) 5.15 SLEW RATE (V/s) 5.1 50.5 5 4.95 4.9 4.85 4.8 -50 -25 0 25 50 75 100 125 150
520 510 500 490 480 470 460 450 440 -50 -25 0 25 50 75 100 125 150
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 21. OUTPUT VOLTAGE vs TEMPERATURE
FIGURE 22. SLEW RATE vs TEMPERATURE
16 OFFSET VOLTAGE (mV) 14 12 IS (mA) 10 8 6 4 2 0 0 1 2 3 4 5 6 7 VS (V)
7 6 5 4 3 2 1 0 -1 -2 -3 -50 -25 0 25 50 75 100 125 150
TEMPERATURE (C)
FIGURE 23. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 24. OFFSET VOLTAGE vs TEMPERATURE
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FN7015.2 March 26, 2007
EL1509 Typical Performance Curves
JEDEC JESD51-3 AND SEMI G42-88 (SINGLE LAYER) TEST BOARD
3 TRANSIMPEDANCE (M) 2.5 2 1.5 1 0.5 0 -50 POWER DISSIPATION (W)
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -25 0 25 50 75 100 125 150
781mW
SO 8 16 0
DF N8 C/ W
&
0
25
50
75 85 100
125
150
TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
FIGURE 25. TRANSIMEDANCE vs TEMPERATURE
FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY (4-LAYER) TEST BOARD (DFN EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-5) 3.5 POWER DISSIPATION (W) 3 2.5
43
2.907W
DF N8 C /W
2 1.5 1 0.5 0 0 25 1.136W
S O8 11 0 C/W
50
75 85 100
125
150
AMBIENT TEMPERATURE (C)
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Applications Information
Product Description
The EL1509 is a dual operational amplifier designed for customer premise line driving in DMT ADSL solutions. It is a dual current mode feedback amplifier with low distortion while drawing moderately low supply current. It is built using Elantec's proprietary complimentary bipolar process and is offered in industry standard pin-outs. Due to the current feedback architecture, the EL1509 closed-loop 3dB bandwidth is dependent on the value of the feedback resistor. First the desired bandwidth is selected by choosing the feedback resistor, RF, and then the gain is set by picking the gain resistor, RG. The curves at the beginning of the Typical Performance Curves section show the effect of varying both RF and RG. The 3dB bandwidth is somewhat dependent on the power supply voltage.
Power Supply Bypassing and Printed Circuit Board Layout
As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended. Lead lengths should be as short as possible, below 1/4". The power supply pins must be well bypassed to reduce the risk of oscillation. A 1.0F tantalum capacitor in parallel with a 0.01F ceramic capacitor is adequate for each supply pin. For good AC performance, parasitic capacitances should be kept to a minimum, especially at the inverting input. This implies keeping the ground plane away from this pin. Carbon resistors are acceptable, while use of wire-wound resistors should not be used because of their parasitic inductance. Similarly, capacitors should be low inductance for best performance.
7
FN7015.2 March 26, 2007
EL1509
Capacitance at the Inverting Input
Due to the topology of the current feedback amplifier, stray capacitance at the inverting input will affect the AC and transient performance of the EL1509 when operating in the non-inverting configuration. In the inverting gain mode, added capacitance at the inverting input has little effect since this point is at a virtual ground and stray capacitance is therefore not "seen" by the amplifier.
Supply Voltage Range
The EL1509 has been designed to operate with supply voltages from 2.5V to 6V. Optimum bandwidth, slew rate, and video characteristics are obtained at higher supply voltages. However, at 2.5V supplies, the 3dB bandwidth at AV = +2 is a respectable 40MHz.
Single Supply Operation
If a single supply is desired, values from +5V to +12V can be used as long as the input common mode range is not exceeded. When using a single supply, be sure to either 1) DC bias the inputs at an appropriate common mode voltage and AC couple the signal, or 2) ensure the driving signal is within the common mode range of the EL1509.
Feedback Resistor Values
The EL1509 has been designed and specified with RF = 1.5k for AV = +5. This value of feedback resistor yields extremely flat frequency response with little to no peaking out to 50MHz. As is the case with all current feedback amplifiers, wider bandwidth, at the expense of slight peaking, can be obtained by reducing the value of the feedback resistor. Inversely, larger values of feedback resistor will cause rolloff to occur at a lower frequency. See the curves in the Typical Performance Curves section which show 3dB bandwidth and peaking vs. frequency for various feedback resistors and various supply voltages.
ADSL CPE Applications
The EL1509 is designed as a line driver for ADSL CPE modems. It is capable of outputting 250mA of output current with a typical supply voltage headroom of 1.3V. It can achieve -85dBc of distortion at low 7.1mA of supply current per amplifier. The average line power requirement for the ADSL CPE application is 13dBm (20mW) into a 100 line. The average line voltage is 1.41VRMS. The ADSL DMT peak to average ratio (crest factor) of 5.3 implies peak voltage of 7.5V into the line. Using a differential drive configuration and transformer coupling with standard back termination, a transformer ratio of 1:2 is selected. The circuit configuration is as shown below.
Bandwidth vs Temperature
Whereas many amplifier's supply current and consequently 3dB bandwidth drop off at high temperature, the EL1509 was designed to have little supply current variations with temperature. An immediate benefit from this is that the 3dB bandwidth does not drop off drastically with temperature.
+ -
12.5
1.5k AFE 464
+ -
TX1 100 1:2 12.5
1.5k
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FN7015.2 March 26, 2007
EL1509 Small Outline Package Family (SO)
A D N (N/2)+1 h X 45
A E E1 PIN #1 I.D. MARK c SEE DETAIL "X"
1 B
(N/2) L1
0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X
SEATING PLANE L 4 4
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07
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FN7015.2 March 26, 2007
EL1509 Dual Flat No-Lead Package Family (DFN)
A D N N-1 0.075 C 2X E PIN #1 I.D.
MDP0047
DUAL FLAT NO-LEAD PACKAGE FAMILY (JEDEC REG: MO-229) MILLIMETERS SYMBOL A A1 b c
1 2 0.075 C
DFN8 0.85 0.02 0.30 0.20 4.00 3.00 4.00 2.20 0.80 0.50 0.10
DFN10 0.90 0.02 0.25 0.20 3.00 2.25 3.00 1.50 0.50 0.50 0
TOLERANCE 0.10 +0.03/-0.02 0.05 Reference Basic Reference Basic Reference Basic 0.10 Maximum Rev. 2 2/07
D D2 E
B TOP VIEW
2X
4 L1
(D2)
E2 e
N-1
N L (N LEADS)
L L1 NOTES:
(E2)
1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Exposed lead at side of package is a non-functional feature.
PIN #1 I.D. 2 5 e b BOTTOM VIEW 1 0.10 M C A B 3
3. Bottom-side pin #1 I.D. may be a diepad chamfer, an extended tiebar tab, or a small square as shown. 4. Exposed leads may extend to the edge of the package or be pulled back. See dimension "L1". 5. Inward end of lead may be square or circular in shape with radius (b/2) as shown. 6. N is the total number of leads on the device.
0.10 C SEATING PLANE 0.08 C
C
SEE DETAIL "X"
(N LEADS & EXPOSED PAD)
2 C A (c)
A1 DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 10
FN7015.2 March 26, 2007

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